二位元多工器 行為模式

module top;
  integer ia0,ia1,ib0,ib1,is;
  reg  a0,a1,b0,b1,s;
  wire out1,out2;

  mux_behavioral mux1(out1,out2,a0,a1,b0,b1,s);

  initial
    begin
      for (ia0=0; ia0<=1; ia0 = ia0+1)
        begin
          a0 = ia0;
          for (ia1=0; ia1<=1; ia1 = ia1+ 1)
            begin
              a1 = ia1;
               for (ib0=0; ib0<=1; ib0 = ib0+1)
                 begin
                   b0 = ib0;
                   for (ib1=0; ib1<=1; ib1 = ib1+ 1)
                    begin
                     b1 = ib1;
                      for (is=0; is<=1; is = is + 1)
                       begin
                        s = is;
                 #1 $display("a0=%d a1=%d b0=%d b1=%d s=%d out1=%d out2=%d",a0,a1,b0,b1,s,out1,out2);
                       end
                    end
                  end
              end
         end
   end
endmodule

module mux_behavioral(OUT1,OUT2,A0,A1,B0,B1,SEL);
 output OUT1,OUT2;
 input A0,A1,B0,B1,SEL;
 wire  A0,A1,B0,B1,SEL;
 reg   OUT1,OUT2;

always @(A0 or A1 or B0 or B1 or SEL)
 begin
   OUT1 = (A0 & SEL)|(B0 & ~SEL );
   OUT2 = (A1 & SEL)|(B1 & ~SEL );
 end

endmodule

二位元多工器 結構模式

module top;

wire [1:0] A, B, OUT;
wire SEL;

system_clock #200 clock1(A[1]);
system_clock #200 clock2(A[0]);
system_clock #100 clock3(B[1]);
system_clock #100 clock4(B[0]);
system_clock #400 clock5(SEL);

mux2 M1(OUT, A, B, SEL);
endmodule

module mux(OUT, A, B, SEL);
output OUT;
input A,B,SEL;
not a1(sel_n, SEL);
and a2(sel_a, A,SEL);
and a3(sel_b, B, sel_n);
or a4(OUT, sel_a, sel_b);




endmodule

module mux2(OUT, A, B, SEL);
output [1:0] OUT;
input [1:0] A,B;
input SEL;

mux hi (OUT[1], A[1], B[1], SEL);
mux lo (OUT[0], A[0], B[0], SEL);
endmodule

module system_clock(clk);
parameter PERIOD=100;
output clk;
reg clk;

initial clk=0;

always
 begin
#(PERIOD/2) clk=~clk;
 end

always@(posedge clk)
 if($time>1000)$stop;

endmodule

一位元多工器 結構模式